The present disclosure relates to semiconductor memory devices and, more particularly, to a semiconductor memory device having a data bus sense amplifier variable in latch type operational mode in accordance with a predetermined timing.
Generally, in semiconductor memory devices, sense amplifiers operate to detect and amplify low-level signals stored in cell arrays, and transfer the detected and amplified signals to data output buffers.
A typical semiconductor memory device is organized by including a cell array, a row decoder, a bit line (BL) sense amplifier, a data bus (DB) sense amplifier, a column decoder, and a control logic block.
A procedure of reading data from a cell of the semiconductor memory device to an external device, for example, a memory controller, is as follows. The row decoder of the semiconductor memory device receives a row address and activates a word line corresponding to the row address. The BL sense amplifier is enabled by the control logic block and then latches the cell data of the active word line. The column decoder receives a column address and provides the DB sense amplifier with BL sense-amplified information in correspondence with the column address. The DB sense amplifier is enabled by the control logic block. The DB sense amplifier detects and amplifies the BL sense-amplified information, and outputs the amplified signal to the data output buffer.
The DB sense amplifier operates in one of a semi-latch type and a full-latch type, while detecting and amplifying the BL sense-amplified information.
With the semi-latch type, the DB sense amplifier operates to output correct data, even though an input signal fluctuates because of noise. In other words, even upon detecting erroneous data, if the correct data is input again thereafter, the DB sense amplifier detects and amplifies the re-input correct data and outputs the amplified correct data. Thus, the DB sense amplifier of the semi-latch type is useful in improving the noise margin characteristic. But the semi-latch DB sense amplifier has disadvantages in that there is much more current consumption in circuit operation, and an output signal swings less in its full range. Here, ‘full swing’ means a state that an output signal is amplified to the level of a supply voltage (Vcc) applied to a sense amplifier.
With the full-latch type, the DB sense amplifier is operable with only small current dissipation, while amplifying an input signal to a full power supply level. The DB sense amplifier of the full-latch type is able to operate in full swing. But, the DB sense amplifier of the full-latch type may output erroneous data when an input signal fluctuates because of noise. In other words, even though correct data is input again after an input of erroneous data, the DB sense amplifier of the full-latch type is unable to detect and amplify the correct data, but detects and amplifies the erroneous data and outputs the amplified erroneous data. Thus, the DB sense amplifier of the full-latch type is more susceptible to noise than the semi-latch type one.
As a result, the DB sense amplifier of the semi-latch type dissipates a lot of current with an insufficient full swing, while the DB sense amplifier of the full-latch type is susceptible to noise and can produce erroneous data.